Tegra210: suspend/resume bpmp interface across System Suspend

The BPMP firmware takes some time to initialise its state on exiting
System Suspend state. The CPU needs to synchronize with the BPMP during
this process to avoid any race conditions. This patch suspends and resumes
the BPMP interface across a System Suspend cycle, to fix this race.

Change-Id: I82a61d12ef3eee267bdd8d4386bed23397fbfd2d
Signed-off-by: Varun Wadekar <[email protected]>

diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
index d18a987b1384f647da483c42d386b7ccfd47e9fe..fde804d040ecce84a4c9f2cd5859c5fb6ce3ae6c 100644 (file)
--- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
@@ -341,6 +341,9 @@ int tegra_soc_pwr_domain_power_down_wfi(const psci_power_state_t *target_state)
                        tegra_se_save_tzram();
                }
 
+               /* de-init the interface */
+               tegra_bpmp_suspend();
+
                /*
                 * The CPU needs to load the System suspend entry firmware
                 * if nothing is running on the BPMP.
@@ -451,6 +454,9 @@ int tegra_soc_pwr_domain_on_finish(const psci_power_state_t *target_state)
                } else {
                        entrypoint = tegra_pmc_read_32(PMC_SCRATCH39);
                        tegra_fc_bpmp_on(entrypoint);
+
+                       /* initialise the interface */
+                       tegra_bpmp_resume();
                }
 
                /* sc7entry-fw is part of TZDRAM area */